The Simulation of a New Asymmetrical Double-Gate Poly-Si TFT with Modified Channel Conduction Mechanism for Highly Reduced OFF-state Leakage Current

Abstract—Poly-Si thin film transistors (TFTs) exhibit large OFF-state reverse leakage currents since their channel conduction is controlled by the gate-induced grain barrier lowering (GIGBL). This also leads to the presence of the pseudosubthreshold region in the transfer characteristic. In this paper, we report a novel poly-Si multiple-gate TFT (MG-TFT), where the front gate consists of three sections with two different materials, in order to reduce the OFF-state leakage current with no significant change in the ON-state current. We demonstrate that the dominant conduction
mechanism in the channel can be controlled entirely by the accumulation charge density modulation by the gate (ACMG) instead of the GIGBL, leading to a steep subthreshold slope without any pseudosubthreshold region when compared to an asymmetrical double-gate poly-Si TFT (DG-TFT), resulting in a significantly reduced O FF-state leakage current. Using two-dimensional (2-D) and two-carrier device simulation, we have analyzed the various performance and design considerations of the MG-TFT and explained the reasons for the improved performance of the MG-TFT.

Index Terms—Double gate, grain boundary, leakage current,
polysilicon, pseudosubthreshold, thin film transistor (TFT), traps,
two-dimensional simulation.

The above paper can be downloaded from http://web.iitd.ac.in/~mamidala/id11.htm

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