The major challenge the radio frequency laterally double-diffused metal oxide semiconductor (RF LDMOS) faces today is the linearity and switching delay. In this paper, we propose a new, gate-engineered silicon- on-insulator (SOI) LDMOS device to overcome this problem. The proposed device has three gates arranged in a stepped manner, from the channel to drift region. The ﬁrst gate uses p+poly (near the source), whereas the other two gates have n+ poly. The ﬁrst gate with a thin gate oxide achieves good control over the channel charge. The third gate with a thick gate oxide at the drift region achieves reduced gate to drain capacitance. The arrangement of second and third gates in a stepped manner in the drift region spreads the electric ﬁeld uniformly. Using two-dimensional device simulations, the proposed LDMOS is compared with the conventional LDMOS. We demonstrate that the proposed device exhibits signiﬁcant enhancements in linearity, switching delay, breakdown voltage, on-resistance, peak transconductance and gate-drain charge making it highly suitable for RF power ampliﬁers.
This paper can be downloaded from http://web.iitd.ac.in/~mamidala/id11.htm