Two-Dimensional Analytical Threshold Voltage Model of Nanoscale Fully Depleted SOI MOSFET with Electrically Induced Source/Drain Extensions

A new analytical model for the surface potential and the threshold voltage  of a silicon-on-insulator (SOI) MOSFET with electrically induced shallow  source/drain (S/D) junctions is presented to investigate the short-channel  effects (SCEs). Dividing the SOI MOSFETs silicon thin film into three  zones, the surface potential is obtained by solving the two-dimensional  Poissons equation. Our model includes the effects of the body doping concentration, the lengths of the side and main gates and their work  functions, applied drain and substrate biases, the thickness of the gate  and buried oxide, and also the silicon thin film. Our model results  reaffirm that the application of induced S/D extensions to the SOI MOSFET will successfully control the SCEs for channel lengths even  less than 50 nm. Two-dimensional simulation results are used to verify  the validity of this model, and quite good agreements are obtained for  various cases.

Index Terms—Device scaling, insulated gate field-effect transistor (FET), short-channel effects (SCEs), silicon-on-insulator (SOI) MOSFET, threshold voltage, two-dimensional (2-D) modeling.

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