A New Poly-Si Triple-Gate Thin Film Transistor (TG-TFT) with Diminished Pseudo-Subthreshold Region: Theoretical Investigation and Analysis

In this paper, we have proposed a new poly-Si triplegate thin-film  transistor (TG-TFT) where the front gate consists of two materials and  three sections in order to reduce the OFF state leakage current without  affecting the ON state voltage. We have used one and three grain- boundaries in the channel for analyzing the electrical characteristics of  the poly-Si TG-TFT. The key idea in this paper is to make the dominant  conduction mechanism in the channel to be controlled by the  accumulation charge density modulation by the gate and not by the gate- induced grain barrier lowering. As a result, we demonstrate that the TG- TFT exhibits a highly diminished pseudosubthreshold region resulting in  a substantial OFF state leakage current without any significant change in  the ON voltage when compared to a conventional poly-Si TFT (C-TFT).  Using two-dimensional and two-carrier device simulation, we have  examined various design issues of the TG-TFT and provided the reasons  for the improved performance.

Index Terms—Grain boundary, leakage current, polysilicon, pseudosubthreshold, thin-film transistor (TFT), traps, two-dimensional (2-D) simulation.

This paper can be downloaded from http://web.iitd.ac.in/~mamidala/id11.htm

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